000 00956cam a2200265 i 4500
001 B6921F5D3BC8484586D268FBFD26235E
003 OSt
005 20240710105514.0
008 140602s2014 si b 001 0 eng
020 _a9781118659182
040 _aDLC
_beng
_cDLC
_erda
_dDLC
050 0 _aTK 7885.7
_bJ46 2014
100 1 _aJeong, Hong,
_eauthor.
245 0 0 _aArchitectures for computer vision :
_bfrom algorithm to chip with Verilog /
_cHong Jeong, Pohang University of Science and Technology, South Korea.
264 1 _aSingapore :
_bWiley,
_c2014.
300 _axv, 450 pages ;
_c25 cm
336 _atext
_2rdacontent
337 _aunmediated
_2rdamedia
338 _avolume
_2rdacarrier
504 _aIncludes bibliographical references and index.
650 1 0 _aVerilog (Computer hardware description language)
650 1 0 _aComputer vision.
942 _2lcc
_cBK
999 _c876
_d876